SMIC doubles 7nm capacity to feed Huawei's Ascend ramp, pilots 5nm
China's lead foundry scales N+2 output for Ascend 910C/910D as Huawei targets ~600k dies; HBM and yields, not lithography, are now the bottleneck
Summary
SMIC is reportedly doubling its 7nm (N+2) capacity in 2026 to supply Huawei's Ascend AI accelerators, the 910C (53B transistors, N+2) and incoming 910D, while running pilot lines for a 5nm process via DUV multi-patterning, with mass production targeted this year for Huawei and Alibaba. Huawei aims for ~600k Ascend 910C dies in 2026 (roughly double prior output), and up to ~1.6M dies across the line. The constraint has shifted: analysts say HBM and advanced packaging, not Smic logic wafers, now gate the ramp, with Huawei holding die banks waiting on memory. China's ~$47.5B "Big Fund III" underwrites yields estimated at 30-40%, far below TSMC's 80%+, as a sanctions-era national-security cost rather than a profit centre.
By the numbers
- 2x, planned increase in SMIC 7nm (N+2) capacity in 2026.
- ~600k, Huawei Ascend 910C dies targeted for 2026; up to ~1.6M across the Ascend line.
- 53B, transistors on the Ascend 910C (SMIC N+2 process).
- 30-40%, estimated SMIC advanced-node yield (vs TSMC 80%+).
- ~$47.5B, China's "Big Fund III" national semiconductor fund.
Why it matters
SMIC is China's escape hatch from the AI-chip controls: every Ascend die it ships is one Beijing did not have to buy from Nvidia or smuggle. Doubling N+2 capacity narrows the gap on volume even as yields stay poor and EUV stays blocked. But if HBM and packaging are the true chokepoint, the controls bite through memory and tools, sharpening the stakes of the ASML and HBM-export fights.
What to watch
- Whether SMIC's 5nm pilot reaches credible mass production this year.
- Huawei's actual Ascend die output vs the ~600k target, and HBM sourcing.
- Any new BIS action on tools/components routed to SMIC (cf. Applied Materials settlement).